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Электронный компонент: STV9556

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September 2003
1/24
Version 4.1
STV9556
7.5 NS TRIPLE-CHANNEL HIGH VOLTAGE VIDEO AMPLIFIER
FEATURES
s
Triple-channel video amplifier
s
Supply voltage up to 115 V
s
80V Output dynamic range
s
Perfect for PICTURE BOOST application
requiring high video amplitude
s
Pinning for easy PCB layout
s
Supports DC coupling (optimum cost saving)
and AC coupling applications.
s
Built-in Voltage Gain: 20 (Typ.)
s
Rise and Fall Times: 7.5 ns (Typ.)
s
Bandwidth: 50 MHz (Typ.)
s
Very low stand-by power consumption
s
Perfectly matched with the STV921x
preamplifiers
DESCRIPTION
The STV9556 is a triple-channel video amplifier
designed in a 120V-high voltage technology and
able to drive in DC-coupling mode the 3 cathodes
of a CRT monitor.
The STV9556 supports PICTURE BOOST
applications where video amplitude up to 50V or
above is required, ensuring a maximum quality of
the still pictures or moving video.
Perfecly matched with the STV921x ST
preamplifiers, it provides a
highly performant and
very cost effective video system.
PIN CONNECTIONS
CLIPWATT 11
ORDER CODE: STV9556
(Plastic Package)
1
2
3
4
5
6
7
8
9
10
11
OUT1
OUT2
OUT3
GNDP
GNDA
IN3
V
DD
GNDS
V
CC
IN2
IN1
1
Table of Contents
2
2/24
1
BLOCK DIAGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
PIN DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
3
ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
4
THERMAL DATA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
5
ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
6
THEORY OF OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
6.1
General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
6.2
Output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
7
POWER DISSIPATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
8
TYPICAL PERFORMANCE CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
9
INTERNAL SCHEMATICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
10 APPLICATION HINTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
10.1 How to choose the high supply voltage value (VDD) in DC coupling mode . . . . . . . . . . 12
10.2 Arcing Protection: schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
10.3 Arcing protection: layout and decoupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
10.4 Video response optimization: schematics in DC-coupling mode . . . . . . . . . . . . . . . . . . . 14
10.5 Video response optimization: outputs networks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
10.6 Video response optimization: inputs networks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
10.7 Video response optimization: layout and decoupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
10.8 AC - Coupling mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
10.9 Stand-by mode, spot suppression . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
10.10 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
11 PACKAGE MECHANICAL DATA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
2
STV9556
3/24
1
BLOCK DIAGRAM
2
PIN DESCRIPTION
Pin
Name
Function
1
IN1
Video Input (channel 1)
2
IN2
Video Input (channel 2)
3
VCC
Low Supply Voltage
4
IN3
Video Input (channel 3)
5
GNDA
Ground Analog
6
GNDS
Ground Substrat
7
VDD
High Supply Voltage
8
GNDP
Ground Power
9
OUT3
Video output (channel 3)
10
OUT2
Video output (channel 2)
11
OUT1
VIdeo output (channel 1)
STV9556
9
11
7
3
OUT3
GNDP
OUT2
OUT1
VDD
VCC
V
REF
10
8
VDD
GNDP
VDD
GNDP
2
4
IN3
IN2
IN1 GNDA
GNDS
5
6
1
3
STV9556
4/24
3
ABSOLUTE MAXIMUM RATINGS
4 THERMAL
DATA
Symbol
Parameter
Value
Unit
V
DD
High supply voltage
120
V
V
CC
Low supply voltage
16.5
V
V
ESD
ESD susceptibility
Human Body Model (100pF discharged through 1.5K
)
EIAJ norm (200pF discharged through 0
)
2
300
kV
V
I
OD
Output source current (pulsed < 50
s)
80
mA
I
OG
Output sink current (pulsed < 50
s)
80
mA
V
IN Max
Maximum Input Voltage
V
CC
+ 0.3
V
V
IN Min
Minimum Input Voltage
- 0.5
V
T
J
Junction Temperature
150
C
T
STG
Storage Temperature
-20 + 150
C
Symbol
Parameter
Value
Unit
R
th (j-c)
Junction-Case Thermal Resistance (Max.)
3
C/W
R
th (j-a)
Junction-Ambient Thermal Resistance (Typ.)
35
C/W
3
STV9556
5/24
5 ELECTRICAL
CHARACTERISTICS
Note 1: The STV9556 goes into stand-by mode when Vcc is switched off (<1.5V).
In stand-by mode, Vout is set to low level.
Note 2: Matching measured between each channel.
Note 3: Pulsed current width < 50
s
Symbol
Parameter
Test Conditions
Min.
Typ
Max
Unit
SUPPLY parameters (V
CC
= 12V, V
DD
= 110V, Tamb = 25 C, unless otherwise specified)
V
DD
High supply voltage
20
110
115
V
V
CC
Low supply voltage
10
12
15
V
I
DD
V
DD
supply current
V
OUT
= 50V
25
mA
I
DDS
V
DD
stand-by
supply current
V
CC
: switched off (<1.5V)
V
OUT
: low (
Note 1
)
60
A
I
CC
V
CC
supply current
V
OUT
= 50V
60
mA
STATIC parameters (V
CC
= 12V, V
DD
= 110V, Tamb = 25 C)
V
OUT
DC output voltage
V
IN
= 1.90 V
77
80
83
V
dV
OUT
/dV
DD
High voltage supply rejection
V
OUT
= 50V
0.5
%
dV
OUT
/dT
Output voltage drift versus temperature
V
OUT
= 80V
15
mV/C
d
V
OUT
/dT
Output voltage matching versus
temperature (
Note 2
)
V
OUT
= 80V
1
mV/C
R
IN
Video input resistor
V
OUT
= 50V
2
k
V
SATH
Output saturation voltage to supply
I
0
=-60mA (
Note 3
)
V
DD
- 6.5
V
V
SATL
Output saturation voltage to GND
I
0
=60mA (
Note 3
)
11
V
G
Video Gain
V
OUT
= 50V
20
LE
Linearity error
17 V<V
OUT
<V
DD
-15 V
3
8
%
V
REF
Internal voltage reference
5.6
V
3
STV9556
6/24
ELECTRICAL CHARACTERISTICS (continued)
Note 4: Matching measured between each channel.
Note 5: PICTURE BOOST condition (video amplitude at 50V or above) is used in some applications when displaying
still picture or moving video. In this condition the high level of contrast improves the pictures quality at the
expense of the video performances (t
R
, t
F
and Overshoot) which are slightly deteriorated.
Figure 1. AC test circuit
Symbol
Parameter
Test Conditions
Min.
Typ
Max
Unit
DYNAMIC parameters (see
Figure 1
)
t
R
Rise time
V
DC
=50V,
V=40V
PP
7.2
ns
t
F
Fall time
V
DC
=50V,
V=40V
PP
8.2
ns
OS
R
Overshoot, white to black transition
5
%
OS
F
Overshoot, black to white transition
0
%
G
Low frequency gain matching (
Note 4
)
V
DC
= 50V, f=1MHz
5
%
BW
Bandwidth at -3dB
V
DC
=50V,
V=20V
PP
50
MHz
t
SET
2.5% Settling time
V
DC
=50V,
V=40V
PP
15
ns
CT
L
Low frequency crosstalk
V
DC
=50V,
V=20V
PP
f = 1 MHz
50
dB
CT
H
High frequency crosstalk
V
DC
=50V,
V=20V
PP
f = 20MHz
32
dB
DYNAMIC parameter in PICTURE BOOST condition (
Note 5
)
t
PB
Rise/fall time
V
DC
=50V,
V=60V
PP
10
ns
OS
PB
Overshoot white to black or black to white
transition
V
DC
=50V,
V=60V
PP
9
%
STV9556
50
IN
C
L
=8pF
GNDP
OUT R
P
= 200
11
7
3
V
DD
V
CC
110V
12V
V
V
DC
V
REF
8
1
5
GNDA
3
STV9556
7/24
6
THEORY OF OPERATION
6.1
General
The STV9556 is a three-channel video amplifier supplied by a low supply voltage: V
CC
(typ.12V) and a
high supply voltage: V
DD
(up to 115V).
The high values of V
DD
supplying the amplifier output stage allow direct control of the CRT cathodes (DC
coupling mode).
In DC coupling mode, the application schematic is very simple and only a few external components are
needed to drive the cathodes. In particular, there is no need of the DC-restore circuitry which is used in
classical AC coupling applications.
The output voltage range is wide enough (
Figure 2
) to provide simultaneously :
Cut-off adjustment (typ. 25V)
Video contrast (typ. up to 40V),
Brightness (with the remaining voltage range).
In normal operation, the output video signal must remain inside the linear region whatever the cut-off,
brightness and contrast adjustments are.
Figure 2. Output signal, level adjustments
(A) Top Non-Linear Region
L
ine
ar
re
gio
n
V
DD
(E) Bottom Non-Linear Region
GND
Blanking pulse
Video Signal
(B) Cut-off Adjust. (25V Typ.)
(C) Brightness Adjust. (10V Typ.)
(D) Contrast Adjust. (40V Typ.)
15V
17V
3
STV9556
8/24
6.2
Output voltage
A very simplified schematic of each STV9556 channel is shown in
Figure 3
.
The feedback network of each channel is integrated with a typical built-in voltage gain of G=20 (40k/2k).
The output voltage V
OUT
is given by the following formula:
V
OUT
= (
G
+1) x
V
REF
- (
G
x V
IN
)
for
G
= 20 and
V
REF
= 5.6V, we have
V
OUT
= 117.6 - 20 x V
IN
Figure 3. Simplified schematic of one channel
2k
40k
GNDP
V
DD
IN
V
REF
GNDA
+
-
OUT
STV9556
9/24
7
POWER DISSIPATION
The total power dissipation is the sum of the static DC and the dynamic dissipation:
P
TOT
= P
STAT
+ P
DYN
.
The static
DC power dissipation is approximately:
P
STAT
= V
DD
x I
DD
+ V
CC
x I
CC
The dynamic dissipation is, in the worst case (1 pixel On/ 1 pixel Off pattern):
P
DYN
= 3 V
DD
x C
L
x V
OUT(PP)
x f x K (see
Note 6
)
where f is the video frequency and K the ratio between the active line and the total horizontal line duration.
Example:
for V
DD
= 110V, V
CC
= 12V,
I
DD
= 25mA, I
CC
= 60mA,
V
OUT
= 40 V
PP
, f = 40MHz,
C
L
= 8pF and K = 0.72.
We have:
P
STAT
= 3.47W and P
DYN
= 3.04W
Therefore:
P
TOT
= 6.51W.
Note 6: This worst thermal case must only be considered for TJmax calculation. Nevertheless, during the average life
of the circuit, the conditions are closer to the white picture conditions.
STV9556
10/24
8
TYPICAL PERFORMANCE CHARACTERISTICS
V
DD
=110V, V
CC
=12V, C
L
=8pF, R
P
=200
,
V=40V
PP
, unless otherwise specified - see
Figure 1
Figure 4. STV9556 pulse response
Figure 5. V
OUT
versus V
IN
Figure 6. Power dissipation vs frequency
Figure 7. Speed versus temperature
Figure 8. Speed versus offset
Figure 9. Speed versus load capacitance
7.2
8.2
overshoot = 5%
overshoot = 0%
0
20
40
60
80
100
120
0
1
2
3
4
5
6
Vin (V)
Vout
(
V
)
0.00
1.00
2.00
3.00
4.00
5.00
6.00
7.00
8.00
10
20
30
40
50
Frequency (MHz)
(72% active time)
Pow
e
r dis
s
i
pat
ion (W)
Vdd=90
Vdd=100
Vdd=110V
7
7.5
8
8.5
9
50
60
70
80
90
100
Case Temperature (C)
S
peed (
n
s)
Tf
Tr
STV9556 Speed vs Offset (Vdc)
6
7
8
9
10
40
45
50
55
60
65
70
Offset (Vdc)
S
peed (ns)
Tf
Tr
6
7
8
9
10
11
12
13
8
10
12
14
16
18
20
Load capacitor (pF)
Speed (
n
s
)
Tf
Tr
STV9556
11/24
9
INTERNAL SCHEMATICS
Figure 10. RGB inputs
Figure 11. RGB outputs
Figure 12. VDD
Figure 13. VCC
Figure 14. GNDP
Figure 15. GNDA
VCC
IN
pins 1, 2, 4
GNDS
OUT
VDD
pins 9, 10, 11
GNDS
GNDS
VDD
VCC
GNDS
GNDS
GNDP
GNDA
GNDS
STV9556
12/24
10 APPLICATION HINTS
10.1
How to choose the high supply voltage value (V
DD
) in DC coupling mode
The V
DD
high supply voltage must be chosen carefully. It must be high enough to provide the necessary
video adjustment but set to minimum value to avoid unecessary power dissipation.
Example (see
Figure 2
):
The following example shows how the optimum V
DD
voltage value is determined:
Cut-off adjustment range (B) : 25V
Max contrast (D) : 40V
Case 1:
10V Brightness (C) adjusted by the preamplifier :
V
DD
= A + B + C + D + E
V
DD
= 15V + 25V + 10V + 40V + 17V = 107V
Case 2:
10V Brightness (C) adjusted by the G1 anode:
V
DD
= A + B + D + E
V
DD
= 15V + 25V + 40V + 17V = 97V
10.2
Arcing Protection: schematics
As the amplifier outputs are connected to the CRT cathodes, special attention must be given to protect
them against possible arcing inside the CRT.
Protection must be considered when starting the design of the video CRT board. It should always be
implemented before starting to adjust the dynamic video response of the system.
The arcing network that we recommend (see
Figure 16
) provides efficient protection without deteriorating
the amplifier video performances.
The total resistance between the amplifier and the CRT cathode (R10+R11) protects the device against
overvoltages. We recommend to use R10+R11 > 200
.
Spark gaps are strongly recommended for arcing protection.
STV9556
13/24
Figure 16. Arcing protection network (one channel)
10.3
Arcing protection: layout and decoupling
Several layout precautions have to be considered to get the optimum arcing protection:
Sparkgap grounding: when an arc occurs, the energy must flow through the CRT ground without
reaching the amplifier. This is obtained by connecting the sparkgap grounding (point B) to the CRT
ground (socket) via a wide/short trace. Conversely the point B must be connected to the amplifier
ground via a longer/narrower trace.
Grounding separation: In order to set apart the amplifer ground and CRT ground, the R29/C29 net-
work (
Figure 16
) can be used.
Amplifier grounding: The 3 grounds GNDS, GNDA and GNDP must be connected together as
close as possible to the device.
R11
R29(***)
110
/0.5W
C18
100nF
C24
4.7
F/150V
C12(*)
100nF/250V
R19(**)
R10
110
/0.5W
L1
0.33
H
D12
FDH400
F1
STV9556
V
DD
OUT
Spark gap
(
*
): To be connected as close as possible to the device
(**): R19 must be mandatorily used
(***): Ground separation network
33-40
200V
C29(***)
0.22
F
1-10
CRT
GNDP
GNDS
GNDA
D13
FDH400
V
DD
A
B
STV9556
14/24
10.4
Video response optimization: schematics in DC-coupling mode
The dynamic video response is optimized by carefully designing the supply decoupling of the video board
(see Section 10.7), the tracks (see Section 10.7), then by adjusting the input/output component network
(see Section 10.5).
For dynamic measurements such as rise/fall time and bandwidth, a 8pF load is used (total load including
the parasitic capacitance of the PC board and CRT Socket).
When used in kit with the STV921x preamplifier from ST, the preamplifier bandwidth register (BW, register
13) must be set to minimum (o dec) for an application with t
R
/t
F
>5.5ns.
Figure 17. Video response optimization for one channel - DC coupling application
C11
4.7
F
R10
L1
R11
CRT
OUT
V
CC
ST
V921x
STV9556
IN
110
110
0.33
H
V
REF
C10(*)
100nF
-
+
R1(**)
51
C1
1.5nF
Reference
OUT
C2
10pF
R1
82
L1
0.33
H
Input Network #2
C2
10pF
R1
33
Input Network #3
IN
IN
C24
4.7
F
V
DD
C12(*)
100nF
R19(***)
33-40
2 other Input Networks (Network #2 and #3 below) can be used in replacement of the reference Input Network #1.
C2
15pF
Caution: For Application with Tr/Tf>5.5ns, the PreAmplifier bandwidth register (BW, Register 13)
must be set to minimum value (0 dec)
(
*
): To be connected as close as possible to the device
(
**
): R1 must be not be higher than 100
(***): R19 must be mandatorily used
See Application note AN1510 for complete description.
Input Network #1
V
DD
GNDP
GNDS
GNDA
STV9556
15/24
10.5
Video response optimization: outputs networks
The output network (R10/L1/R11) is used to adjust the amplifier video performances. Once R10 and R11
resistors are set to protect the application against arcing (R10 + R11>200
), it is possible to increase the
bandwidth by increasing L1.
10.6
Video response optimization: inputs networks
The input network also plays an important role in the device dynamic behaviour. We recommend to use
the reference input network #1, which is described in
Figure 17
, but 2 other networks (#2 and #3) can be
used to better match the required performances and the video board layout. Refer to the application note
referenced AN1510 for the complete description of these input networks.
10.7
Video response optimization: layout and decoupling
The decoupling of V
CC
and V
DD
through good quality HF capacitors (respectively C10 and C12) close to
the device is necessary to improve the dynamic performance of the video signal.
Careful attention has to be given to the three output channels of the amplifier.
Capacitor: The parasitic capacitive load on the amplifier outputs must be as small as possible.
Figure 9
from
Section 8
clearly shows the deterioration of the
t
R
/
t
F
when the capacitive load
increases. Reducing this capacitive load is achieved by moving away the output tracks from the other
tracks (especially ground) and by using thin tracks (<0.5mm), see
Figure 17
.
Cross talk: Output and input tracks must be set apart. The STV9556 pin-out allows the easy separa-
tion of input and output tracks on opposite sides of the amplifier (see
Figure 21
).
Length: Connection between amplifier output and cathode must be as short and direct as possible.
STV9556
16/24
10.8
AC - Coupling mode
The STV9556 can be used in AC-Coupling mode in kit with the TDA9207/9212 preamplifier from ST. As
for the DC-coupling mode, the STV9556 drives perfectly the video signal in PICTURE BOOST conditions.
A typical schematic is given on the
Figure 18
below.
Figure 18. Video response optimization for one channel - AC coupling application
The advantage of such an architecture is to use smaller V
DD
and therefore to have smaller power
consumption. This is due to the fact that the STV9556 provides only the video signal and not the cut-off
adjustment. The disadvantage is to have an application with more components (DC restore circuitry).
Note that it is mandatory to keep the output video signal (point C) inside the linear area of the amplifier
(from 17V to V
DD
- 15V).
C24
4.7
F
C11
4.7
F
R10
L1
R11
CRT
OUT
V
CC
V
DD
T
D
A920
7
STV9556
IN
110
110
0.33
H
V
REF
C10(*)
100nF
C12(*)
100nF
-
+
DC Restore
circuitry
Cut-off
V
restore
C1
1
F
OUT
R19(***)
33-40
Caution: For Application with Tr/Tf>5.5ns, the PreAmplifier bandwidth register (BW, Register 13)
must be set to minimum value (0 dec)
(
*
): To be connected as close as possible to the device
(
**
): R1 must be not be higher than 100
(***): R19 must be mandatorily used
(****): Input Networks #2 and #3 can be used as well
C
V
DD
GNDP
GNDS
GNDA
R1(**)
51
C1
1.5nF
Reference
C2
10pF
Input Network #1 (****)
STV9556
17/24
10.9
Stand-by mode, spot suppression
The usual way to set a monitor in stand-by mode is to switch-off the Vcc (12V).
The STV9556 has an extremely low power consumption (I
DDS
= 60A when V
CC
<1.5V) in stand-by mode
and the outputs are set to low level (white picture).
To avoid the display of a spot effect during the switch-off phase, it is necessary to adjust the G1 circuitry
(Resistors Rx and Cx, see
Figure 19
) to pull the G1 voltage to low value for a long enough period of time.
Figure 19. Stand-by mode, spot effect
Rx
Cx
Typical G1 generator circuitry
Case #2: High Rx.Cx
Case #1: Low Rx.Cx
G1
A spot might appear during
No spot effect
the switch-off phase
EHT
(27kV)
Cathode
G1
R1
-120V
-30V
0V
-30V
-120V
+80V
STV9556
18/24
10.10 Conclusion
Video response is always a compromise between several parameters. For example, the rise/fall time
improvement leads to the overshoot deterioration.
The recommended way to optimize the video response is:
1
To set R10+R11 for arcing protection (min. 200
)
2. To adjust R20 and R10+R11.
Increasing their value increases the
t
R
/
t
F
values and decrease the overshoot
3. To adjust L1
Increasing L1 speeds up the device but increases the overshoot.
4. To adjust the input network for the final dynamic tunning (e.g.: critical damping)
We recommend our customers to use the schematic shown on
Figure 23
as a starting point for the video
board and then to apply the optimization they need.
STV9556
19/24
Figure 20. STV9556/9555/9553 + TDA9210/STV9211 + STV9936S/P DC-coupling demonstration
board: Silk Screen and Trace
STV9556
20/24
Figure 21. Outputs trace (from figure 19)
Figure 22. CRT socket trace (from figure 19)
STV9556
21/24
Figure 23.STV9556/55/53 + STV9936S/P + TDA9210/STV9211 DC-coupling demo-board schematic



















































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































































GN
DP




























































ABL
R4
2.
7
5V
D1
1N
4148
D3
1N
4
148
Bl
u
e
R3
75
J1
vi
deo
1
2
3
4
5 6
R5
75
R1
0
75
D6
1N
4148
D8
1N
41
48
D4
1N
41
48
D5
1
N
414
8
R2
1
5
R8
1
5
R
1
2 15
R
16 2.
7
G
r
een
Re
d
C4
C3
100
nF
10
0nF
C
9
1
00nF
C
6
100
nF
C
2
2
10
0nF
10
OS
D3
F
B
L
K
11
OS
D2
S
C
L
OS
D1
S
D
A
VC
CA
O
U
T3
GN
DA
IN
3
O
U
T
2
GN
DL
V
CCP
IN
2
O
U
T
1
A
B
L
H
S/C
L
P
IN
1
B
L
K
1
2
3
4
5
6
7
8
9
20
19
18
17
16
15
14
12
13
R
4
7
100
R
40 10
0
C
5
100
nF
C2
6
100p
F
R
25 10
0
R
1
100
HS
BL
K
C1
10
0pF
R
11 2.
7
8V
C3
1

1
.
5nF
R9
51
C3
3

1
.
5nF
R
13
51
C
36
1.
5n
F
R
17
51
C2
3
10p
F
C2
5
10pF
5V
R
1
9
2.
7k
R
2
1 2.
7
k
SC
L
C1
3
10
0pF
SD
A
C1
2
1
00pF
I2
C
5V
1
2
3
4
J1
0
R2
8
0
C2
1
10nF
/
250V
opt
i
o
nal
11
0V
GN
D
J7
1
2
3
T
DA9
2
1
0
HS1
R
adA
B
2
0
C1
6
47F
/
25V
C1
5
47F
/
25V
5V
8V
12
V
1
10V
C2
7
47F
/
25V
AB
L
J1
6
Po
we
r
1
2
3
4
5
6 7
8
R3
7
5
1
ZD
1
3V
0
C2
7
4
7F/
2
5V
G1
H
EAT
ER
VS
HS
HF
L
Y
7
6
5
4 3 2
1
Sy
n
c
J1
7
R
4
6 5.
6k
C
3
5
10
nF
R
45 1
5
k
R
44 5.
6
k
C
34 10nF
R4
3
1M
L4 1
H
C3
7
10
0F/
2
5V
C2
1
00nF
Rp
Vc
o
AVd
d
R
3
6 33
0
R
3
2 33
0
R
3
3 33
0
R
3
4 33
0
9
16
15
14
13
12
11
10
S
T
V99
36S/
P
1
2
3
4
5
6
7
8
C3
2
100
F/
2
5
V
C
2
8
10
0nF
L5 1
H
3.
3V
R
4
1
100
R
3
5
100
R
3
9
100
R
3
8
100
SDA
SCL
VS
HF
L
Y
SDA
SCL
VS
HF
L
Y
DVD
D
DVS
S
TES
T
OVD
D
RO
UT
GO
UT
BO
UT
FB
L
K
AV
DD
VC
O
RP
AV
SS
12V
C8
47
F/
2
5
V
C7
1
00nF
C1
0
10
nF/
2
5
0
V
C1
8
4.
7F/
1
60V
R
29 3
9
110
V
R6
110
/0
.2
5
W
11
0V
D2
FD
H
400
D1
0
FD
H
400
110V
D7
FD
H
400
D1
2
FD
H
400
D9
FD
H
400
D1
3
FD
H
400
R1
4
11
0
/0
.2
5
W
R2
2
110
/0
.2
5
W
L1
0.
3
3H
L2
0
.
33H
L3
0.
3
3H
R7
11
0
/0
.2
5
W
R1
5
110
/0
.2
5
W
R2
3
110
/
0
.
25W
RK
GK
BK
F2
200V
F4
200V
F1
200V
3
7
Vcc
Vdd
In
1
O
u
t
1
In
2
O
u
t
2
In
3
O
u
t
3
GNDA
GNDS
GNDP
1
2
4
11
10
9
5
6
8
R
G
B
C
R
T
sm
al
l

neck
H
eat
er
C1
4
100nF
C1
9
F3
1.
5
R3
1
30
/0
.5
W
J8
G2
R2
7
15
0
/0
.2
5
W
D1
1
1N
4
004
C2
0
4.
7n
F/
1kV
4.
7nF/
2
kV
10
9
5
7
1
12
H1
H2
G1
G2
GND
GND
E
V
AL
CRT5
2
/
S
T
V
9
55x
de
mob
o
a
r
d
(
AB2
5)
Ver
s
i
o
n
1.
4
Re
v
.
C
W
e
d
n
esd
ay Oct
o
b
e
r
3,
20
01
S
T
Mi
c
r
oe
l
e
c
t
r
o
ni
c
s
M
o
n
i
t
o
r
B
u
si
n
ess U
n
i
t
-
V
i
d
e
o
ap
p
l
i
cat
i
o
n
C
M
G -
I
m
ag
i
n
g

an
d
D
i
s
p
l
a
y D
i
vi
si
o
n
(
I
D
D
)
12
,
r
u
e Ju
l
es
H
o
r
o
wi
t
z
-
B
.
P
.
217
38
019 Grenobl
e cedex -
F
RANCE
5V
5V
3.
3
V
3.
3V
U3
U1
10pF
C2
4
ST
V955
6
U2
1
10V
G1
BL
K
STV9556
22/24
11 PACKAGE
MECHANICAL
DATA
11 PIN - CLIPWATT
Dimensions
Millimeters
Inches
Min.
Typ.
Max.
Min.
Typ.
Max.
A
2.95
3
3.05
0.116
0.118
0.12
B
0.95
1
1.05
0.037
0.039
0.041
C
-
0.15
-
-
0.006
-
D
1.3
1.5
1.7
0.051
0.059
0.061
E
0.49
0.515
0.55
0.0.019
0.02
0.021
F
0.78
0.8
0.86
0.03
0.031
0.034
F1
-
0.05
0.1
-
0.002
0.004 (
6
)
G
1.6
1.7
1.8
0.063
0.067
0.071
G1
16.9
17
17.1
0.665
0.669
0.673
H1
-
12
-
-
0.472
-
H2
18.55
18.6
18.65
0.73
0.732
0.734
H3
19.9
20
20.1
0.783
0.787
0.791 (
5
)
L
17.7
17.9
18.1
0.696
0.704
0.712
L1
14.35
14.55
14.65
0.564
0.572
0.576
L2
10.9
11
11.1
0.429
0.433
0.437(
5
)
L3
5.4
5.5
5.6
0.212
0.216
0.22
M
2.34
2.54
2.74
0.092
0.1
0.107
M1
2.34
2.54
2.74
0.092
0.1
0.107
R
1.45
-
-
0.057
-
-
V1
H3
H2
H1
R2
R
R1
L2
L3
S
LEAD#1
G
G1
F1
F
Shaded area ewposed from plastic body
Typical 30
m
M
M1
E
V
R3
R3
R3
B
D
L1
V1
V1
V2
C
V1
A
STV9556
23/24
Note 5: "H3 and L2" do not include mold flash or protrusions
Mold flash or protrusions shall not exceed 0.15mm per side.
Note 6: No intrusions allowed inwards the leads
Critical dimensions:
Lead split (M1)
Total length (L)
R1
3.2
3.3
3.4
0.126
0.13
0.134
R2
-
0.3
-
-
0.012
-
R3
-
0.5
-
-
0.019
-
S
0.65
0.7
0.75
0.025
0.027
0.029
V
10deg.
10deg.
V1
5deg.
5deg.
V2
75deg.
75deg.
Dimensions
Millimeters
Inches
Min.
Typ.
Max.
Min.
Typ.
Max.
STV9556
24/24
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for
the consequences of use of such information nor for any infringement of patents or other rights of third parties which may
result from its use. No license is granted by implication or otherwise under any patent or patent rights of
STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication
supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as
critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a trademark of STMicroelectronics.
2002 STMicroelectronics - All Rights Reserved
Purchase of I2C Components of STMicroelectronics, conveys a license under the Philips I2C Patent.
Rights to use these components in a I2C system, is granted provided that the system conforms to the I2C Standard
Specifications as defined by Philips.
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4